Architectural Synthesis of Complex Systems on Silicon


Keywords: design methodology, design tools, high level synthesis tools, specification, ASICs, CAD, CAM, hardware/software codesign, compilers

Start Date: 1 January 95 / Duration: 36 months

[ participants / contact]

Objectivies and Approach

The goal of this project is to assess, optimize and transfer new design methods and tools for the realisation of complex systems on ASICs. This work will be based on case studies of ASIC specifications that are of relevance to local industry in Brazil. It will also require the combination of EU developed high level synthesis tools such as Cathedral and Amical with commercial in-house CAD tools of the Brazilian partner. The resulting design will be evaluated with respect to other reference designs. The target application is a low power version of a wireless paging system, which combines both DSP and control functions. A reference system called DIRAC, has already been developed at IMEC, but with little emphasis on the optimisation of power consumption. The goal is to evaluate to what extent the use of the high level synthesis software can help in the developing of new, low power architectures.

Progress and Results

The emphasis is being put on the synthesis and simulation of the synchronisation functions implemented in software. This functionality combines control flow and data flow semantics and is a good candidate for combining DSP tools with Controller synthesis tools. In the project these functionalities will be implemented in hardware. The existing specification has been extensively studied, and has been converted to C. Co-simulation of the data flow part and the control flow part is being done to provide a reference for any further design optimisations. Starting from the C-description of the tracking and acquisition routines, a behavioural VHDL description will be derived. This description will then be converted to structural VHDL. During this process the design will be optimised for low power consumption.

Information Dissemination Activities and/or Exploitation

In early 1996 the Brazilian partner received training in Leuven and Grenoble on the CAD tools used in this project. In late 1996 IMEC will organize training on digital architectures and the use of synthesis tools at the University of Sao Paulo in Brazil. In early 1997 Brazilian students will visit IMEC for additional training. The wireless satellite pager, which provides the reference application for this project, is currently being commercialised by a European company. A low power version of this system will be of important commercial benefit.


Kapeldreef 75
3001 Leuven, B

EU Partners

IMEC, Leuven, B
INPG-TIMA, Grenoble, F

Non-EU Partners

University of Sao Paulo, BRZ


Mr. Marius Strum
Tel: +55 11 815 93 22
Fax: +55 11 818 57 18
Mr. Bert Gyselinckx
Tel: +32 16 281 211
Fax: +32 16 281 515

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ARCOS - KIT106, May 1997

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