Keywords: digital to analogue conversion, analogue to digital conversion, analog-digital interfacing, high performance signal digitalisation
Start Date: 1 January 95 / Status: finished / Duration: 24 months
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The aim of this project is to investigate new high-precision calibration systems which can lead to a more efficient implementation of a high-linearity low-resolution DAC (digital to analogue conversion) than current solutions provide, and which can also be readily applied to such different ADC (analogue to digital conversion) architectures as oversampling multi-bit Sigma-Delta and pipeline systems. These systems should measure the absolute conversion code voltages of the main DAC, rather than the capacitance values or intercode transitions of its capacitor-array, employ a simple, robust calibration reference DAC rather than the array of capacitors as is used for conversion, and employ a sub-binary, rather than binary, code error digitisation and a corresponding code error correction to minimise silicon area.
European links: ESPRIT projects ADCIS (2196), AD2000 (5056) and MEDCHIP (7307).
Low-resolution DACs with very high linearity conversion characteristics: a prototype chip has been realised in a 1.2 µm CMOS technology from Austria MikroSysteme.
High-resolution pipeline CMOS ADCs for high-speed applications: The previously devised generalised system solution has been customised for the specific architectural needs of multi-bit pipelined ADCs. A pipeline ADC with a target specification of 15 bit resolution and 5 MHz conversion frequency has been designed. The first most critical front-end stages of the pipelined ADC were designed and submitted for fabrication in a 1.0 µm CMOS technology. The complete ADC has been designed and is currently being fabricated in 0.8 m CMOS technology.
Multi-bit Sigma-Delta modulators for high-resolution DACs: A multi-bit oversampling Sigma-Delta-based DAC with a conversion resolution of 16 bits and conversion frequency of 50 MHz has been considered. The D/A converter was designed for the 1.2 µm ORBIT technology. The prototype chip is currently in fabrication at ORBIT (USA).
Results obtained so far have been presented at international conferences and workshops and have been published in international journals. The list of 8 publications made within DACs may be requested from the coordinator.
Instituto Superior Tecnico
Integrated Circuits and Systems Group
Av. Rovisco Pais, 1
1096 Lisboa Codex - Portugal, P
Instituto Superior Tecnico, P
Oregon State University, USA
Prof. Jose E. Franca
Tel: +351 1 841 76 75
Fax: +351 1 841 76 75
DACs - EC-US044, May 1997
please address enquiries to the ESPRIT Information Desk
html version of synopsis by Nick Cook