High-Level Synthesis Algorithms, Tools and Design


HILES - EC-US031

Keywords: synthesis algorithms, embedded systems, hardware/software codesign, concurrent design


Start Date: 1 August 93 / Duration: 48 months

[ participants / contact]


Objectivies and Approach

The goals of this collaborative action are to investigate algorithms for synthesis of concurrent design in microelectronics and to explore the use of high level synthesis tools in industrial applications by: providing standard VHDL front ends to synthesis systems from the partners using existing industrial tools; researching efficient algorithms for constraint-based synthesis of concurrent hardware, addressing in particular the scheduling problem for a large variety of circuits; addressing the synthesis of concurrent hardware modelled by parallel processes, with particular reference to the global communication and synchronisation schemes; exploring the use of synthesis tools on industrial design examples, such as designs of complex processors and automotive applications.

Progress and Results

The following results have been achieved so far: a VHDL front-end for Std 1076-1993, based on CASTLE's SIR library, is available; Control Flow Expressions are established as a compact format for modelling parallel processes and investigating the communication among different modules of an embedded system; a framework for organising design data for WWW is under construction; an extensive set of complex application examples, including a Diesel injection controller, an integrated navigation receiver, an embedded video compression system, GOLLUM (an integrated navigation receiver) and WISSCE (wireless indoor spread spectrum communication equipment), were selected to form a basis for developing design tools.

Information Dissemination Activities and/or Exploitation

A HILES workshop took place at Stanford University in November 1995. Dissemination and exploitation activities within HILES include cooperation with industrial partners (e.g., Bosch, Thesys) in establishing the application examples, as well as talks and tool presentations at important companies (Philips, Synopsys, SGS-Thomson).

More about HILES at http://set.GMD.de/wilberg/desktop/hiles/index.html.


Coordinator

GMD-SET
Schloss Birlinghoven
D - 53754 Sankt-Augustin, D

EU Partners

GMD, D
Delft University of Technology, NL

Non-EU Partners

Stanford University, USA

CONTACT POINT

Dr. Liliane Peters
Tel: +49 2241 14 25 11
Fax: +49 2241 14 21 10


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HILES - EC-US031, May 1997


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html version of synopsis by Nick Cook