Work Area: Theories and Models for the Design of Heterogeneous Systems
Keywords GaAs, ASIC, compilers, synthesis, data-paths, VHSIC, BIST
Start Date: to be announced / Status: starting
[ participants / contact ]
Abstract The aim of this working group is to improve the knowledge of European researchers on mixed mode Gallium Arsenide (GaAs) VLSI circuit design, and to generate facilities for allowing the reliable design of such circuits. Effort is targeted for fast digital signal processing and other very high speed applications such as broadband telecommunications, hardware accelerators and workstations. It aims at delivering a design environment with the same level of performance in quality and design time for GaAs as is available for silicon to ASIC designers in Telecom and Information Processing fields.
The technological advances in GaAs allow the fabrication of circuits close to the complexity of silicon counterparts. The circuits have to be designed at a higher level of abstraction, through synthesis tools, taking into account the GaAs characteristics. The high operating frequency and properties of the material, makes the design of GaAs circuits a difficult process. In addition, the design of Digital Signal Processors requires an extensive set of library cells (including analog circuitry and A/D cells), and function generators like RAM, ROM, which do not exist in present silicon tools used for GaAs. All these tools, particularly at the layout level, have to take into account the application (high frequency and complex ASICs) and the characteristics of GaAs technology (multiple metal layers, semi-insulating substrate, surface cost). This requires special strategies and methods which will be addressed in the working group.
The project will develop and validate a design methodology intended for easy design structuring and improved reliability featuring small sensitivity to temperature and process variations. These issues, as well as performance goals in terms of small area, low power and high speed, are very important for widespread industrial acceptance of GaAs technology.
The existing cooperation among several European Universities will be reinforced to realise a more formal and coordinated synergy where important issues in GaAs IC design can be developed without overlaps or duplications of efforts and resources.
The intention of all the parners in this project is that the design methods, cell libraries, modules analysis and evaluation methods developed, will be made available to a large community of designers. The results obtained from GRASS will be made available by mailing reports upon request, by publishing the results through conferences and scientific journals, and by organising specific workshops and seminars. These open workshops are scheduled to take place in Las Palmas de Gran Canaria (1994), Grenoble (1995) and London (1996).
This working group, which is intended to help keep Europe in the race for GaAs ICs, will manage all design flow steps from the high level description down to the layout drawing, in an integrated design framework. An extensive use of standards and of major industrial tools will be made. This work will thus make GaAs available to the Community of silicon-trained designers, system designers, SMEs and postgraduate students in academia.
Universidad de Las Palmas de Gran Canaria - E
Campus Universitario de Tafira
E- 35017 LAS PALMAS DE GRAN CANARIA
Ecole Polytechnique Fédérale de Lausanne - CH
Fraunhofer-Gesellschaft - D
Technical University of Denmark - DK
Institut National Polytechnique de Grenoble - F
Middlesex University - UK
Prof. Antonio Nunez
tel +34/58 451250
fax +34/28 451243
GRASS - 9144, August 1994
please address enquiries to the ESPRIT Information Desk
html version of synopsis by Nick Cook