Single Electronics


SETTRON - 9005

Work Area: Ultimate Miniaturisation

Keywords single electron devices, noise and stability, interfacing


Start Date: to be announced / Status: starting

[ participants / contact ]


Abstract SETTRON focuses on the electronic properties of ultraminature semiconductor and metal structures in the 10 nm range. It addresses the technological issues that determine the possibility of realising practical electronic circuits based on the controlled handling of single electrons. This includes interfacing to standard macroscopic electronic circuitry and increased operating temperature.


Aims

The project addresses the technological issues governing the implementation of practical single electronics circuits. In recent years the partners forming this consortium have demonstrated the physical effects of single electrons in systems with very small capacitance and associated large Coulomb energy per electron. These results point towards a great potential for fast, ultrahigh density and low power electronics. SETTRON focuses on the technological aspects for these types of devices. Based on existing state-of-the-art fabrication technologies, systematic studies will be made to employ these to their limits, to eliminate performance limiting defects and to design and implement improved circuits and interfacing to standard electronics. The optimised results for metal and semiconductor based technologies will allow an evaluation of the relative merits for specific applications.

Approach and Methods

One of the main issues is the reduction of capacitance. We expect to achieve an improvement of at least one and possibly two orders of magnitude, leading to an increase of operating temperature form 1 K to 10 (and possibly) 100 K. In addition the RC times will decrease from 100 to 10 ps, with 1 ps being possible. Fabrication is performed using electronbeam lithography with direct writing, pushing the dimensions from 100 nm to below 20 nm. Single electron devices operate at relatively high impedance levels, requiring small capacitance, high resistance leads. Interfacing single electron circuits to conventional electronics requires the development of special coupling schemes combining metallic and semiconductor structures in the same circuit. This requires high-quality metal semiconductor contacts with dimensions below 100 nm to be made. The achievements will be evaluated using two well-defined devices, acting as test structures. These will be the two-junction electrometer or single-electron transistor, where in particular stability, sensitivity and noise properties will be studied. In addition a turnstile or turnstile-like current standard will be developed that is a good test sample for future digital logic elements and memory cells.

Potential

SETTRON will provide prototype single electron devices, showing their potentials and limitations in view of present day technology, complemented by documented methods to fabricate and interface these. In the short term, future potential includes high-sensitivity photo and charge detection, and high accuracy current standards. In the longer term very fast, high density and ultra-low power electronics could emerge. Spin-offs for immediate application include improved understanding of random charges and noise in very small FET-type devices.


Coordinator

Delft University of Technology - NL
DIMES/Dept. of Applied Physiscs
Lorentzweg 1
NL- DELFT 2600 GA

Partners

Physikalisch-Technisch Bundesantalt - D
CEA Saclay - F
Charmers University - S
University of Glasgow - UK

CONTACT POINT

Dr. C.J.P.M. Harmans
tel +31-15-785195
fax +31-15-617868
e-mail: harmans@sg.tn.tudelft.nl


LTR synopses home page LTR work area index LTR acronym index LTR number index LTR Projects index
All synopses home page all acronyms index all numbers index

SETTRON - 9005, August 1994


please address enquiries to the ESPRIT Information Desk

html version of synopsis by Nick Cook