Keywords BiCMOS, ASIC, MeV implants, mini-environments
Start Date: 01-AUG-93 / Duration: 36 months
[ contact / participants ]
The high cost and slow turnaround times for customised ASICs currently prevent SMEs rom utilising full-custom ASICs, especially for small volumes. Moreover, the steadily increasing demand for mixed-signal ASICs requires that new design and process technologies be developed for fast turnaround, low-cost BiCMOS ASICs.
The project's aims are to:
These developments will lead to the highly competitive capability of 5-day turnaround time for ASIC fabrication, as well as a lower threshold, especially for SMEs, to embark on ASIC design.
A new consortium incorporating all complementary skills of the supply chain has been formed to achieve the overall objective. The project is driven by an advanced ASIC manufacturer and includes partners with the following expertise:
The starting point of the project is a newly built ASIC wafer fab based on an advanced mini-environment clean room with computer-controlled 6" single wafer processing, flexible enough to exploit the hardware, software, and process flow technologies to be developed by the consortium. Furthermore, a CAD design environment (on PCs as well as on workstations) together with a design manual including libraries covering all steps in the design flow will be created and optimised with respect to the 5-DAY ASIC facility.
End-users will validate the 5-DAY ASIC concept in the telecommunications and RF application sectors. The main deliverables will be the realisation of the 5-DAY ASIC wafer fab and two demonstrator 5-DAY ASICs manufactured with the developed design tools and process flow.
Bonner Wall 6
D - 50677 Köln
tel: + 49/ 221.343245
fax: + 49/ 221.343216
PREMA - D - C
EUROEXPERT - F - P
AEA - UK - P
INESC - P - P
CATENA - NL - P
INTRACOM - GR - P
DÜNNSCHICHT ANLAGEN SYSTEME GMBH - D - P
Project 8789, December 1993
please address enquiries to the ESPRIT Information Desk
html version of synopsis by Nick Cook