Keywords 0.5 micron, ASICs, BiCMOS technology, CMOS, minifab, cluster tools, VLSI manufacturing, wafer fabrication
Start Date: 01-OCT-93 / Duration: 9 months
[ contact / participants ]
The overall goal of FAB 2000 is to assess and demonstrate the economical feasibility of a dedicated ASIC minifab that is characterised as an extremely flexible, ultrashort cycle time manufacturing line producing state-of-the-art CMOS and BiCMOS products using 0.45 micron/O.35 micron process technologies. This particular project acting as phase I of this activity, will conduct a validation of the concept.
The concept requirements will be defined and investigations will establish the strengths and weaknesses in Europe, and how gaps may be filled.
This work is essential to investigate ways of reducing the dramatically rising entry costs in the manufacture of advanced semiconductor technology products. The particular aim is to define a technology for the production of cost effective small volume ASICs in ultra short cycle times, but the results are also appropriate for use in larger volume lines providing a scalable low cost migration towards new process generations.
The work will include software simulation for single wafer lots and significant consideration of the methodology for integrated manufacture including automated process monitoring. Considerations will also include industry standards, open systems, mini-environments, cell control, advanced process control, smart sensors, human interfaces, and single wafer processing options. The final part of the project will produce specifications for the accepted minifab option, detailing the content of following phases.
Mr E. Demoulin
EUROPEAN SILICON STRUCTURES (ES2)
F - 13106 ROUSSET CEDEX
tel: + 33/ 42 33 40 32
fax: + 33/ 42 33 40 01
ES2 - F - C
GEC-PLESSEY SEMICONDUCTORS - UK - P
GRESSI - F - P
SIEMENS - D - P
TEXAS INSTRUMENTS - GERMANY - D - P
ISL - UK - A
FAB 2000 - 8413, December 1993
please address enquiries to the ESPRIT Information Desk
html version of synopsis by Nick Cook