Process Optimisation in Multiple Dimensions for Semiconductor Technology


PROMPT - 8150

Keywords sub-micron technologies, 3D process simulation, 3D device simulation, simulation tools, device optimisation


Start Date: To be announced / Duration: 24 months

[ contact / participants ]


Objectives and Approach

In the chain of simulation programs which are needed to support the development and optimisation of ULSI devices, three-dimensional (3D) process simulation is mandatory to provide reliable input for 3D device simulation. Unlike in the field of device simulation, there has been until now no 3D process simulation program available, except a few internal programs of limited generality developed by leading Japanese and American companies.

In the PROMPT project, the required 3D process simulation system will be developed. To cut down on both development and computing times of such a system, for PROMPT an approach has been defined which combines the use of existing 1D and 2D process simulators with the development and application of 3D process simulation modules which need to be newly developed in the project. Depending on user requirements and IC layout, the PROMPT system will automatically divide the device into separate parts which will then individually be simulated in 1D, 2D or 3D. The geometry and doping distributions of the full device will then be automatically compiled from these separate simulations.

To achieve this goal, three main activities will be carried out in PROMPT. The first task is the detailed specification and later evaluation of the PROMPT system. This task will be mainly carried out by the industrial partners of PROMPT. Second, the development of new advanced program modules for the 3D simulation of the semiconductor fabrication steps, including the generation and adaptation of the meshes needed for the numerical calculations. This task will be carried out in a joint effort by major European research institutes. Third, a program framework will be developed to automatically divide the device into separate regions with the aim to simulate each of these regions with the minimum dimensionality allowed by the IC layout, and then automatically compile the whole device from these results. This framework will use both the newly developed 3D simulation modules and existing 1D and 2D process simulation programs for the simulation of the individual domains. This software integration work will be mainly carried out by ETH Zurich, which is also responsible for software integration within the running ESPRIT project DESSIS on 3D device simulation. Process simulation programs to be interfaced with or to be integrated into PROMPT include the 1D program SUPREM III and the 2D programs DIOS, STORM, and SUPREM IV. The 3D device simulation tools to be interfaced include DESSIS and MINIMOS. The PROMPT project is linked especially to the projects ADEQUAT (7236) and DESSIS (6075). In cooperation with these projects, PROMPT also contributes to the progress in the field of interconnect modelling and simulation.


CONTACT POINT

Mr Juergen Lorenz
FhG-IIS-B
Artilleriestr. 12
D - 91052 Erlangen
tel: + 49/ 9131 810415
fax: + 49/ 9131 810 450
email: lorenz@ais.fhg.de

Participants

FHG-AIS - D - C
ETHZ - CH - P
FHG-ISIT - D - P
GPS - UK - P
GRESSI - F - P
ISE AG - CH - A
ISEN - F - P
SGS THOMSON - I - P
SIGMA-C - D - A


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PROMPT - 8150, December 1993


please address enquiries to the ESPRIT Information Desk

html version of synopsis by Nick Cook