Keywords 0.5 micron CMOS, 0.7 micron CMOS, biCMOS
Start Date: 01-OCT-93 / Duration: 24 months
[ contact / participants ]
The TIBIA project aims to satisfy the components needs of the electronic equipment industry for bipolar and BiCMOS ICs. This will be achieved by developing and establishing BiCMOS and bipolar technologies at the 0.7 - 0.5 micron generation, together with the design and CAD expertise to exploit the technology. The performance goals (speed, power, noise) of the BiCMOS technology will be in excess of that achievable by CMOS technology using the same ground-rules. In order to address the market segments with increasing annual sales a variety of BiCMOS and bipolar technologies will be required. This project will generate the essential bipolar/BiCMOS technologies that will be accessible to all European systems, design houses and other users of the technology.
Product prototypes will be designed for the first key customer contacts to ensure a strong focus on market needs and for qualification of the technology. The technologies which are to be developed during the course of this project are:
High-performance analogue/digital BiCMOS, of which the paramount requirement is for a high performance analogue/digital technology capable of supporting products in both consumer and personal communication areas. The technology will follow the CMOS feature size migration from 0.7 to 0.5 micron. Emphasis will be on developing high performance bipolar together with low voltage and low power operation capability.
Low-cost analogue/digital BiCMOS includes the development of a BiCMOS process suitable for both digital and analogue applications in Consumer and Telecom. The bipolar components will be integrated into core CMOS technologies. The emphasis will be on realising a low cost BiCMOS technology with relatively high performance bipolar.
High speed bipolar/BiCMOS is dedicated to producing uncompromised high performance technology, not solely in terms of digital gate delay but also in analogue parameters such as noise figure. Operation from reduced supply voltages should permit advanced analogue functions to be performed at very low power. In many cases BiCMOS processes can easily be converted into pure BIPOLAR processes by omitting simply the typical CMOS mask steps and implantations.
All three classes of BiCMOS/bipolar processes with challenging performance targets will be available with 0.7 micron ground-rules. Particular attention will be given to the manufacturability, reproducibility and cost of the processes. The feasibility of bipolar/BiCMOS technologies at the 0.5 micron level will be evaluated to provide the baseline for the subsequent generations of these technologies. This means that this project will supply the essential technology background on BiCMOS for the European electronic equipment industries for the late 1990s.
Because of its basic importance to bipolar, effort will be spent on emitter-base configuration and isolation. New concepts are aimed at strongly improving the bipolar transistor performance for mixed analogue/digital applications and at strongly improving the low power/low voltage operation of the circuits. It is considered essential to evaluate novel device concepts in order to be able to have options for high performance circuits (speed, noise) available. Devices based on recent progress in low temperature epitaxy of Si and SiGe layers will be investigated.
Besides the npn transistor, other high-performance devices are needed for some applications. These devices include resistors, capacitors, output transistors and vertically isolated pnp-transistors, which will enlarge the application field of the process.
The generation of accurate compact models and the development of test and characterisation methods of simple circuit building blocks will provide the necessary information to enable the design of product prototypes to be "right first time"..
As the availability of cell libraries is of premium importance for customer support, these will be realised. Moreover, to cope with a possible 0.9 - 4.0 V battery power-supplies of the 0.7 and 0.5 micron technology generation, investigations on novel circuit schemes will be done in order to take full advantage of the BiCMOS technologies. Emphasis will be given to low voltage (down to 0.9 V) and low power dissipation. Strategies will be worked out for array concepts for best route-ability and easiest placement.
All partners within TIBIA already offer the possibility to design in their IC processes in production or in pilot-line production to external users.
In order to make the technology accessible for small users via circuit design, a service, similar to that now in place for CMOS projects, may be established.
The work foreseen in the TIBIA proposal is aimed at developing manufacturable and yielding BiCMOS processes that will serve the needs of high-volume applications as well as small-volume production. Work is planned for basic research in order to improve also performance of devices with reduced vertical and lateral dimensions and to improve the understanding of the physical phenomena.
Mr A. Linssen
Nederlandse Philips Bedrijven BV
Prof. Holstlaan 4
NL - 5656 AA EINDHOVEN
tel: + 31/ 40 742795
PHILIPS SEMICONDUCTORS - NL - C
PHILIPS CONSUMER ELECTRONICS BV - NL - P
ALCATEL SEL - D - P
GEC PLESSEY SEMICONDUCTORS - UK - P
MATRA-MHS SA - F - P
MIETEC - B - P
SGS-THOMSON MICROELECTRONICS - F - P
SIEMENS AG - D - P
LINKÖPING UNIVERSITY - S - A
DELFT INSITUTE OF MICROELECTRONICS - NL - A
EUROPEAN SILICON STRUCTURES SA - F - A
INDUSTRIAL MICROELECTRONICS CENTER - S - A
INESC - P - A
SEMICONDUCTORES INVESTIGACION - E - A
UNIVERSITY OF DUBLIN - IRL - A
BELL TELEPHONE MANUFACTURING CO - B - A
CNM - E - A
TECHNICAL RESEARCH CENTRE - SF - A
NMRC - IRL - A
TEMIC TELEFUNKEN MICROELECTRONIC - D - A
CENTER - B - A
TECNOPOLIS CSATA NOVUS ORTUSA
CENTRE NATIONAL D'ETUDES DES
TELECOMMUNICATIONS - F - A
COMMISSARIAT A L'ENERGIE ATOMIQUE
TIBIA - 8001, December 1993
please address enquiries to the ESPRIT Information Desk
html version of synopsis by Nick Cook