High-Performance Heterogeneous Interprocessor Communications


OMI/HIC - 7252

Keywords OMI, communications, serial links, fibre optics, IEEE 1355, SCI, ELI


Start Date: 01-APR-92 / Duration: 36 months

[ contact / participants ]


Objectives

The objective of the OMI/HIC project is to provide low-cost, high-performance serial interconnect for the OMI. It will develop technologies to provide a range of cost/performance trade-offs within a common protocol framework, at moderate distance scales, ie chip-to-chip, board-to-board, rack-to-rack and room-to-room. Target performance levels are 200 Mbaud, 700 Mbaud to 1 Gbaud, and 2-3 Gbaud. The project aims to:

reseults and progress

The design of a higher-speed DS-Link is nearly complete. Prototype CMOS driver and receiver circuits for optical interconnect are being tested. A CMOS chip has been developed to provide a parallel interface to a 1 Gbaud serial link, with built-in support for the lower levels of the protocol stack. A test chip has demonstrated feasibility of 3 GBaud in BiCMOS. A design study for a high-performance routing chip with advanced features has been done. A book has been published about DS-Links and their applications, and the protocols developed within the project are the basis for a draft IEEE standard, p1355.

Further information about HIC is available from the HIC home page.


CONTACT POINT

Dr Colin Whitby-Strevens
INMOS Limited
1000 Aztec West
Almondsbury
UK - Bristol BS12 4SQ
tel: + 44/ 454 611500
fax: + 44/ 454 617910
email: colinws@isnet.inmos.co.uk

Participants

INMOS LTD - UK - C /
THOMSON-SINTRA ASM - F - P /
THOMSON-LCR - F - P /
BULL-SA - F - P /
BULL ITALIA SPA - I - P /
DOLPHIN INTERCONNECT SOLUTIONS - N - A /
UNIVERSITE PIERRE ET MARIE CURIE - F - A


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OMI/HIC - 7252, December 1993


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html version of synopsis by Nick Cook