Work Area: Algorithms for Design Methodologies for Complex Circuits and Digital Optical Systems
Keywords asynchronous systems, asynchronous circuits, VLSI, synthesis, verification
Start Date: 1 August 92 / Duration: 18 months / Status: running
[ participants / contact ]
Abstract ACID-WG brings together partners from a variety of backgrounds, including electrical engineers who are looking to asynchronous circuit technology for low latency and low power consumption, and computing scientists who are involved in the development of formal methods for the design of concurrent systems.
Asynchronous circuits and associated design methodologies have potential practical benefits for the European VLSI industry. The aim of ACID-WG is to facilitate collaboration at a European level in this research area. ACID-WG will contribute to R&D in microelectronics (CAD and design methodology) and in the Open Microprocessor Systems Initiative (OMI). In particular, ACID-WG and its sister-project EXACT (OMI project 6143, Exploitation of Asynchronous Circuit Technologies) have been planned on a coordinated basis to ensure maximum complementarity and cost-effectiveness of research. Asynchronous systems are also being designed, as part of OMI/MAP (5386), OMI/DE (6909) and OMI/HORN (7249), by Manchester University, a partner in ACID-WG. A number of companies have expressed an interest in the outcome of the research.
Six workshops will be organised by ACID-WG over the next three years. Besides attending the workshops, partners are expected to visit each other for the purpose of collaborative research in asynchronous circuit design. The activities of ACID-WG will be coordinated with those of EXACT.
The First ACiD-WG Workshop (jointly organised with EXACT) was on the theme of Asynchronous Controllers and Interfacing. It was hosted by IMEC in Leuven, Belgium, September 14-16, 1992. The workshop included tutorial sessions on IMEC's ASSASSIN compiler.
The second ACiD-WG Workshop (jointly organised with EXACT) was on the theme of Asynchronous Data Processing. It was hosted by Eindhoven University of Technology in Veldhoven, The Netherlands, December 14-15, 1992. The workshop included tutorial sessions on Philips' TANGRAM compiler and Manchester's experience with the design of "micropipelines".
The Third ACiD-WG Workshop was on the theme of Digital Signal Processing, hosted by Universitat Politecnica de Catalunya in Barcelona, Spain, September 20-22, 1993.
Participants in ACiD-WG also contributed to the Schloss Dagstuhl on Self-Timed Design, Germany, November 30 - December 4, 1992, and to the IFIP Working Conference on Asynchronous Design Methodologies, Manchester, U.K., March 31 - April 2, 1993.
Partners in ACID-WG and EXACT intend to reconcile their existing approaches and advance the state of the art in asynchronous circuits and associated design methodologies. The results should be of interest to the European VLSI industry as a whole because of the great potential of this technology in terms of ease of design, low power consumption and low latency, in particular. The workshops, demonstrators and educational activities will raise awareness among research groups and industry of this alternative to synchronous circuit technology.
The research activities of the participants in the working group, including new results from the EXACT project, are presented at the ACiD-WG workshops. The proceedings of each workshop is made into a technical report by the host institution and its availability is advertised on the 'asynchronous newsgroup', which is read by most of the international research community working in the field.
Although the ACiD-WG workshops are intended mainly for participants in the working group, a few invitations are also sent out. Invited participants have included representatives of Working Group 6904 (INCIDE) and Working Group 6017 (CHARME-2).
Participants are at present mainly presenting their research at conferences. New courses are also being devised by the universities. In the future, the publication of more journal articles and books on asynchronous circuit design is to be expected.
South Bank University - UK
School of Computing, Information Systems and Mathematics, 103
UK - London SE1 0AA
IMEC vzw - B
Technical University of Denmark - DK
Universidad Cantabria - E
Universidad Politecnica de Catalunya - E
Technische Universiteit Eindhoven - NL
Philips Research Laboratories - NL
Universiteit van Groningen - NL
INESC - P
Loughborough University of Technology - UK
University of Manchester - UK
University of Oxford - UK
University of Surrey - UK
Dr. M.B. Josephs
ACID-WG - 7225, August 1994
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html version of synopsis by Nick Cook