Novel Parallel Algorithms and New Real-Time VLSI Architectural Methodologies 2


NANA 2 - 6632

Work Area: Algorithms for Design Methodologies for Complex Circuits and Digital Optical Systems

Keywords parallel algorithms, real-time multi-dimensional signal and data processing, parallel application specific architectures and synthesis techniques


Start Date: 1 June 92 / Duration: 36 months / Status: running

[ participants / contact ]


Abstract Novel parallel algorithms, VLSI architectures and synthesis techniques for the important domain of multidimensional signal processing (MDSP) are badly needed in real-time systems. Their development will have a beneficial impact on computer-aided hardware design and synthesis environments. The work builds on the results of NANA (action 3280).


Aims

A first aim of NANA 2 is to develop new real-time parallel algorithms and new VLSI architectures for a variety of applications, both in real-time multi-dimensional signal processing and in numerical processing. Here, a clear need exists for novel parallel algebraic and numerical kernels and the combinations of kernels into complete algorithms.

In order to allow future design of complex high throughput applications, NANA 2 also explores novel technologies in the area of architectural synthesis techniques, which create a suitable architecture from a behavioural specification.

Approach and Methods

The NANA 2 approach will continue on the same track as that of NANA (action 3280), with the work divided into two areas:

Progress and Results

The following major results have been achieved:

All these developments have lead to several publications in international journals and conferences, and to 6 Ph.D. dissertations. Based on these results, we believe the project to be very successful up to now. All milestones have been achieved and all planned deliverables have been produced.

Potential

The work is of major importance for the development of efficient systems in many fields such as image and seismic processing, video, robotics, radar, sonar, telecommunication, factory automation, biomedical technology and adaptive beamforming. Studying the systems in terms of both novel parallel algorithms and efficient new architectural methodologies will allow to map these systems onto future VLSI or parallel processor realisations with smaller design and production costs.

Latest Publications

Most recent results for the domains addressed in this project have been published in a large number of articles in international conferences, workshops and journals. Major articles include:

Information Dissemination Activies

Several internal mini-workshops have been organised, where the partners have exchanged information, also including many researchers which are not on the NANA2 budget. A global international workshop will be organised which is open to the academic and industrial community. The target location is Leuven and the target date is May 1994.

Several partners are also spending effort in industrial affiliate and other industrial programmes to disseminate early successes of the NANA 2 work.


Coordinator

IMEC vzw - B
Kapeldreef 75
B - 3001 LEUVEN

Partners

Katholieke Universiteit Leuven - B
Ecole Normale Supérieure de Lyon - F
INRIA/IRISA - F
Delft University of Technology - NL

CONTACT POINT

Prof. Francky Catthoor
tel +32/16 281201
fax +32/16 281515
e-mail: catthoor@imec.be (UUCP)


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NANA 2 - 6632, August 1994


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html version of synopsis by Nick Cook