VLSI Design Training Action


EUROCHIP - 6573

Work Area: VLSI Design Training

Keywords training, VLSI design, access to microelectronic foundries


Start Date: 1 April 92 / Duration: 36 months / Status: running

[ participants / contact ]


Abstract A distributed infrastructure for the support of very large scale integration (VLSI) design training throughout the Community is being developed. By enhancing the training capacity of universities and polytechnics and providing well-defined routes to fabrication facilities, the quality of engineers trained in VLSI design will be increased to meet the future needs of European industry. Recently, the infrastructure has been extended to the support of SMIs.This is the second phase of an initiative that began with action 3700.


Aims

During the first phase EUROCHIP aimed to increase the VLSI design training capacity of the Community's academic institutions from 1500 to 4500 engineers per year. The results have been far beyond since 7,000 students have been trained during the first year and 10,000 the second year. Through the provision of a comprehensive infrastructure to Universities and SMIs, the Action promotes VLSI design training which results in an increase in the use of advanced microelectronics, particularly in key sectors of European industry.

Activities

The service organisation, EUROCHIP, consists of a consortium of 5 experienced technology organisations from different Community member states that handles all aspects of the Europe-wide action. Advice and guidance of a strategic nature is provided by a steering board drawn from European industry and academic. At its beginning 118 selected European academic institutions received support which included the provision of selected hardware, software and access to foundry services as well as support for dedicated lectureship posts. To date, more than 300 Academic Institutions participate, and the infrastructure has been recently opened to cooperation with SMIs in order to facilitate technology transfer. In this phase of the project, the commercial CAD software has been extended to include logic synthesis and FPGAs. Also a scheme has been provided for the exchange of university CAD software, 6 advanced training courses have been set up. The Action is already well established. For the results of the first phase, refer to Action 3700.

Potential

The VLSI Design Training Action, EUROCHIP, has a high potential for providing a coordinated training effort for a specific need within the Community. It offers the opportunity to address the wider training needs of academic and training institutions. Through the cooperation with SMIs, the needs of practising engineers for VLSI design will be met and, by the provision of advanced technologies, a valuable technological resource will be made available to academic researchers and industrial designers.

Further information about EUROCHIP is available from the EUROCHIP home page <URL:http://eurochip.id.dtu.dk/>.


Coordinator

GMD - Schloß Birlinghoven - D
P.O. Box 1316
D-53737 SANKT AUGUSTIN

Partners

IMEC vzw - B
Danmarks Tekniske Hojskole - DK
CMP - Grenoble - F
SERC - Rutherford Appleton Laboratory - UK
and more than 306 academic institutions

CONTACT POINT

Mr. A. Kaesser
tel +49/22 4114 2580
fax +49/22 4114 2342
e-mail: kaesser@borneo.gmd.de


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EUROCHIP - 6573, August 1994


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html version of synopsis by Nick Cook