Keywords ASIC packaging, plastic packaging, PQFP
Start Date: 01-JUN-92 / Duration: 36 months
[ contact / participants ]
The main objective of ASAP is to develop high-performance single chip plastic packages with high reliability. An important goal of the project is to understand the influence of the plastic packaging process and the surface mounting method on the reliability and performance of high-speed digital and analog ASICs.
The project will concentrate on the further development of three types of advanced plastic quad flat-pack (PQFP) packages:
These three types of packages will be fully defined and characterised and made available to the project partners for reliability assessment, surface mounting on PCBs and product validation.
A thorough evaluation of plastic packaging enhanced reliability problems will be carried out using advanced test vehicles and characterisation methods, conventional and novel schemes for accelerated stress testing, and the application and improvement of the most relevant techniques for failure analysis and evaluation.
Finally, a methodology for the qualification of high-performance and high-reliability ASIC components will be defined using modified test methods and test sequences that are faster than those presently in use.
For both the small and large body size PQFP packages, the package definition and specifications for moulding and trim and form tools have been finalised. The development of the 0.5 mm lead pitch packages has already resulted in the availability of mechanical samples for the reliablity evaluation of the developed PQFP packages and for the assessment of surface mounting capabilities on printed circuit boards. The definition of process windows for the selected materials and the optimisation of the related processes and materials is proceeding as planned.
With respect to the development of the power PQFP, complete drawings and tool specifications have been finalised. The major effort went into the design of the slug and the selection of slug material.
Preliminary three-dimensional finite element thermomechanical analysis has been performed for small and large body size PQFP packages with reduced thickness. Preliminary warpage analysis of the developed power PQFP has been used for the optimisation of the package structure.
Novel accelerated humidity test methods (HAST) are being evaluated as potential alternative stress methods for fine-pitch PQFP packages and power PQFP packages. Dedicated sub-micron CMOS testchips have been developed in order to check the influence of the PQFP package on device stability and performance.
Specific advanced equipment has been investigated for the handling, testing and burn-in of fine-pitch PQFP packaged devices. The activities related to the definition of manufacturing methods and the associated process proofing of the interconnection of the PQFP package on the printed circuit board have been started.
Production validation has started for the small and large body size PQFP packages with 0.5 mm lead pitch.
Mr Gust Schols
B - 9700 Oudenaarde
tel: + 32 / 5533-2211
fax: + 32 / 5531-8112
MIETEC NV - B - C
ASM FICO TOOLING BV - NL - P
ALCATEL SEL AG - D - P
SIEMENS AG - D - P
SGS-THOMSON MICROELECTRONICS SA - F - P
RESEARCH CENTRE - IRL - P
ALCATEL BELL TELEPHONE NV - B - P
ASAP - 6386, December 1993
please address enquiries to the ESPRIT Information Desk
html version of synopsis by Nick Cook