ASSIST - 6108
Work Area: Alternative Advanced Semiconductor Materials, Devices and Process Steps
Keywords UHV semiconductor processing, cluster tools, surface cleaning, oxide growth, surface analysis, atomic-scale surface roughness
Start Date: 27 May 92 / Duration: 36 months / Status: running
[ participants / contact ]
Abstract ASSIST aims to gain atomic-scale control of the surfaces and interfaces in elemental components of silicon devices, and to prove the benefits of such control for current and future fabrication technologies. The work builds on the results of PROMPT (3109).
Aims
The drive to smaller device dimensions in ULSI CMOS fabrication places considerable demands on process stability and quality control to achieve satisfactory device reliability. For this reason, ultra-clean processing based on ultra-high vacuum cluster tools has received considerable attention in recent years. ASSIST aims to gain atomic-scale control of the surfaces and interfaces in the elemental components of silicon devices (MOS gates, Schottky barrier and Ohmic contacts), and to assess the benefits of such control for current and future fabrication technologies.
Approach and Methods
A previous Basic Research Action, PROMPT (3109), led to the development of a UHV cluster tool for the fabrication of MOS test-sets. Through the use of this cluster tool and integrated diagnostic facilities (STM and ion scattering), the consortium was able to correlate the performance of MOS devices with such factors as surface contamination and atomic-scale roughness.
The consortium brings together complementary skills and a unique equipment base with which to pursue its objectives. The essential skills brought to the project include UHV cluster tool with in situ diagnostics (AEA Technology); electrical characterisation (IMEC); scanning tunnelling microscopy (Cambridge University); and advanced silicon cleaning technology (Wacker).
Devices will be fabricated in the UHV cluster tool and characterised at each process step. The electrical properties of the devices will then be correlated with process parameters such as wet chemical cleaning procedures, contamination and silicon initial surface structure, and roughness. Structures will also be fabricated by conventional processing routes for comparison purposes. The results will be evaluated in terms of possible applications in current and future processing technologies.
Progress and Results
A study of H atom dry cleaning of Si surfaces in our Ultra High Vacuum Cluster Tool has been carried out. It was found possible to remove hydrocarbon contamination from the surface at temperatures of 150 ¡C to 350 ¡C. The native oxide, and a thin UV/Ozone oxide on the Si surface are stable to attack by H atoms for temperatures below 700 ¡C. In parallel to this study we have designed and built a Time-of-Flight (TOF) Medium Energy Ion Scattering Spectrometer (MEISS) for improved sensitivity analysis of impurities on Si. This equipment can be used to detect light elements (eg H; CO) by recoil scattering from a Si surface and heavy elements by backscattering analysis. The equipment will be installed on the cluster tool to replace the existing less sensitive electrostatic MEISS system.
A new technique for the examination of gate oxide dielectric strength with about 20 nm spatial resolution has been developed. The technique uses a conducting cantilever in an Atomic Force Microscope (AFM). The AFM is scanned to measure surface topography in the usual way. During the scan the instrument is periodically stopped and a voltage is applied in increasing steps between the sample and conducting cantilever. At each voltage level a Fowler-Nordheim (FN) tunnelling current is determined. The voltage ramp-up is stopped at a preset current level, set below the dielectric breakdown value. A map of the voltage required to reach the preset FN tunneling current serves as spatialy resolved measure of dielectric quality. In measurements of thin gate dielectric (about 10 nm thick) small regions some hundreds of nm square were found to withstand fields as high as 40 MV/cm; this is a factor of three higher than found on conventional MOS capacitor test sets fabricated on similar material. This development provides for the first time the ability to test gate oxides with a spatial resolution similar to that used to measure Si surface roughness prior to gate oxidation.
Studies of pre-gate oxide chemical cleaning methods has lead to the re-appraisal of the traditional RCA clean and the proposal of a new improved procedure, the IMEC clean. This new cleaning procedure has given evidence of improved gate oxide yield. A study of the H terminated surface produced by HF last step cleaning has shown a correlation between the pH of the HF clean and the resultant surface roughness deduced from the relative amount of mono, di, and tri-hydride species left on the Si surface. Preliminary measurements of Si surface roughness using UHV STM correlates well with the results deduced from the H termination measurements.
Potential
The results of the ultra clean processing investigations will enable the development of improved VLSI fabrication techniques to be made. The observation of gate dielectric breakdown at fields as high as 40MV/cm over small areas is encouraging for the reliability of the thin gate oxides required for the next generations of CMOS devices. However, much work is still required to achieve improvements in MOS yields, including a better understanding of the effects of Si surface roughness and surface impurities in order to achieve improved breakdown values over large areas.
Both the conducting AFM and the TOF-MEISS equipment developed in this programme are now available as commercial instrument packages. The IMEC cleaning procedure has been patented and exploitation routes are being persued at present.
Latest Publications
Graf D, Bauuer-Mayer S, Schnegg A Reaction of NH4F/HF Solutions on Si(100) and Si(111) Surfaces To appear in J. vac. sci. Technol.
Graf D, Bauer-Mayer S, Schnegg A Influence of HF-H202 treatment on Si(100) and Si(111) Surfaces To appear inFD j. APPL. phys.
Verhaverbeke S, Bender H, Meuris M, Mertens P W, Schmidt H F, Heyns M M HF-Last Cleanins: a Study of the Properties With Respect to Different Variables In: Proc. Spring 1993 Materials Research Soc. Meeting, San Francisco, USA
Murrell M P, Welland M E, O'Shea S, Wong T M H, Barnes J, McKinnon A W, Heyns M and Verhaverbeke S, Spatially Resolved Electrical Measurements of SiO2 Gate Oxides using Atomic Force Microscopy, In: Appl. Phys. Lett. 62(7), Feb. 1993
Information Dissemination Activies
The ASSIST consortium organised a Workshop on 'Ultra Clean Processing of Silicon Surfaces' in Leuven, Belgium, Sept. 1992 and will repeat this workshop in Brugge, Belgium, Sept. 1994.
Coordinator
AEA Technology - UK
B 477 Harwell Laboratory - UKAEA
UK - DIDCOT OX11 ORA
Partners
IMEC vzw - B
Wacker Chemitronic - D
University of Cambridge - UK
CONTACT POINT
Dr C.J. Sofield
tel +44/235-432155
fax +44/235-433029
ASSIST - 6108, August 1994
please address enquiries to the ESPRIT Information Desk
html version of synopsis by Nick Cook