European Vanguard Efforts on Research and Engineering of Systems for Testing

EVEREST - 2318

Keywords CAD, CAD tools, testability, VLSI testers

Start Date: 01-JAN-89 / Duration: 48 months

Objectives and Approach

During the last few years, exploitation of the ever-progressing fabrication technologies has resulted in increased complexity in electronics products and hence an increase in the cost of testing them. In certain areas this testing can account for up to half the product cost. This can best be solved by treating the design and testing of the new product as part of the same problem.

The EVEREST project aimed to provide a consistent environment for checking the testability of products while they are being designed, and for generating the data which will ensure that the designs can be verified before construction and that the fabricated parts can be easily tested for manufacturing faults.

The project developed a prototype VLSI Verification Tester for mixed-signal circuits and an integrated suite of CAD tools which can help to remove the bottleneck between CAD and CAT environments.

The most important targets were:

a verification tester to provide a complete design to test solution for VBSs
a CAE ATE independent test specification format
knowledge based solutions for test planning and failure diagnosis at various levels
tools for test generation, functional validation, test data analysis and fault simulation
design for testability methods for a silicon compiler environment
integration of all functions in a user friendly workstation environment.

Exploitation

At the end of the project, the European IT industries have benefited greatly from the availability of low-cost equipment (verification tester) and associated software, with the resultant drop in the cost of testing. Furthermore, the products developed according to the proposed methods, using the tools generated in the project, should show less defects and should perform more reliably while remaining no more expensive to test.

The project partners have strongly influenced the proposed extension to the international EDIF standard to cover test data.

Philips Electronic Design & Tools has announced a new product, PANTHER, based on the concept of macro test developed together with the SPHINX tool in the EVEREST project.

CONTACT POINT

Dr. O. Steensen
ELEKTRONIK CENTRALEN
Venlighedsvej 4
DK - 2970 HORSHOLM
tel: + 45/ 2-867722
fax: + 45/ 2-865898
telex: 37121 ELCTR DK

Participants

ELEKTRONIK CENTRALEN - DK - C
BULL SA - F - P
SIEMENS AG - D - P
NEDERLANDSE PHILIPS BEDRIJVEN BV - NL - P
TELEFONICA INVESTIGACION
Y DESARROLLO - E - P
TECHNISCHE UNIVERSITEIT EINDHOVEN - NL - A
UNIVERSIDAD DE CANTABRIA - E - A
UNIVERSIDAD POLITECNICA DE MADRID - E - A
UNIVERSIDAD POLITECNICA DE
CATALUÑA - E - A
UNIVERSITÄT DUISBURG - D - A
UNIVERSITE DE MONTPELLIER II (USTL) - F - A
IMEC VZW - B - A
RE TECHNOLOGY AS - DK - A
SCANTEST SYSTEM A/S - DK - A
UNIVERSITY COLLEGE DUBLIN - IRL - A
BRUNEL UNIVERSITY - UK - A
INESC - P - A
HERIE - F - A

EVEREST - 2318, December 1993

please address enquiries to the ESPRIT Information Desk

html version of synopsis by Nick Cook