Bipolar Advanced Silicon for Europe


BASE - 2016

Keywords bipolar technology, high-speed devices


Start Date: 01-FEB-89 / Duration: 45 months

[ contact / participants ]


Objectives and Approach

The goal of this project is to develop and fully integrate technology expertise design and CAD achievements in the deep submicron range. The target specifications after three years are:

Process characteristics          Specifications
emitter width (minimum)             0.5 micron
gate delay                          30 pS
power delay product                 25 fJ
no. of interconnection layers       3
via pitch (minimum)                 3.5
cut-off frequency (maximum)         25 GHz

For comparison, at the beginning of the project pilot production processes worldwide and also at the partners were characterised by 1 to 1.5 micron emitter widths, around 80 to 100 ps gate delays, 3 interconnect layers at around 5 micron minimum via pitch, and maximum complexities of up to 40 000 transistor functions.

Very high speed bipolar technology fills a very important area between the lower performance but higher complexity per chip provided by MOS technology, and the extreme device speed but lower complexity per chip, higher cost per function, and limited availability of gallium arsenide. Bipolar technology is most suitable for high precision, high complexity and high-speed future information technology systems because its analogue features are best, its intrinsic speed is excellent, its transconductance (driving capability) is best, and availability as well as future perspectives are excellent. Higher data-processing rates, broader bandwidth communication and increased use of digital signal-processing techniques all demand the use of advanced bipolar technology.

Progress and Results

Several approaches based on trench and oxide isolation were evaluated. Oxide and trench isolation have proven to be able to meet process specifications, with the selection depending on required performance, packing density and allowable cost. Inside spacer, outside spacer and aligned poly emitter-base structures were developed and compared. Inside and outside spacer poly emitter-base strucutres fulfil the required process performance. A three-level metallisation system has been developed (pitch <3.5 microns). Several planarisation techniques using organic and inorganic insulating materials were developed and evaluated.

Si-SiGe epitaxial layers were grown at low temperature, achieving very promising results. However, since the integration of epitaxial SiGe base layers into high-performance and self-aligned devices structures requires larger departures from conventional processing, further work is necessary to take full advantage of strained SiGe multi-layers in future silicon ICs. In the area of substrate preparation, techniques such as gettering, cleaning, low temperature and selective epitaxy were improved in order to obtain a very low defect density. Very accurate simulation tools and compact models for performance simulation of analogue circuits were developed.

The complete process has been integrated and demonstrators and prototype circuits have been fabricated and evaluated in order to demonstrate the performances of the processes, notably for applications in the field of consumer and telecommunications electronics, fast data and signal processing, and high-speed ASICs. In addition to common performance demonstrators, a number of company-specific ICs have been produced: 10 Kgates mixed analogue/digital array for 10 Gbit/s systems, 8-bit 350 MHz ADC, 14-20 GBit/s MUX, 8-10 Gbit/s laser driver, amplifier plus prescaler input stage, an ISDN 2.5 Gbit/s 16:1 MUX/DEMUX, a radio amplifier/mixer for mobiles, and a direct waveform synthesiser (with 1.6 GHz clock) producing sine, square and triangular waveforms up to 400 MHz.

All the industrial partners in the consortium offer to internal and external users the possibility of using the developed bipolar technology in production or pilot lines.


CONTACT POINT

Mr A.J. Linssen
PHILIPS GLOEILAMPENFABRIEKEN NV
PO Box 80 000
NL - 5600 JA EINDHOVEN
tel: + 31/ 40-742795
fax: + 31/ 40-743390
telex: 35000

Participants

PHILIPS GLOEILAMPENFABRIEKEN - NL - C
PLESSEY COMPANY PLC - UK - P
SGS-THOMSON
MICROELECTRONICS SPA - I - P
SIEMENS AG / SEMICONDUCTOR GROUP - D - P
TELEFUNKEN ELECTRONIK GMBH - D - P
SGS-THOMSON
MICROELECTRONICS SA - F - P
TECHNISCHE HOCHSCHULE
DARMSTADT - D - A
TÜV - D - A
IMEC VZW - B - A
DRA - UK - A
NTUA - GR - A
TRINITY COLLEGE DUBLIN - IRL - A


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BASE - 2016, December 1993


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html version of synopsis by Nick Cook